By Antonio Balzanella, Rosanna Verde (auth.), Joanna Kołodziej, Beniamino Di Martino, Domenico Talia, Kaiqi Xiong (eds.)
This quantity set LNCS 8285 and 8286 constitutes the complaints of the thirteenth overseas convention on Algorithms and Architectures for Parallel Processing, ICA3PP 2013, held in Vietri sul Mare, Italy in December 2013. the 1st quantity comprises 10 individual and 31 usual papers chosen from ninety submissions and masking themes reminiscent of immense information, multi-core programming and software program instruments, allotted scheduling and cargo balancing, high-performance clinical computing, parallel algorithms, parallel architectures, scalable and allotted databases, dependability in disbursed and parallel structures, instant and cellular computing. the second one quantity involves 4 sections together with 35 papers from one symposium and 3 workshops held along side ICA3PP 2013 major convention. those are thirteen papers from the 2013 foreign Symposium on Advances of disbursed and Parallel Computing (ADPC 2013), five papers of the overseas Workshop on enormous information Computing (BDC 2013), 10 papers of the overseas Workshop on depended on info in giant info (TIBiDa 2013) in addition to 7 papers belonging to Workshop on Cloud-assisted clever Cyber-Physical platforms (C-Smart CPS 2013).
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Additional resources for Algorithms and Architectures for Parallel Processing: 13th International Conference, ICA3PP 2013, Vietri sul Mare, Italy, December 18-20, 2013, Proceedings, Part I
On the other hand, the third option avoids rollover and aliasing issues associated with counters, but it imposes additional memory management burden. Within these options, we chose the third, because it is the simplest approach that solves all the problems as it relies on the garbage collection subsystem to provide uniqueness and the ability to recycle unused ﬁngerprints. M. Carvalho and J. Cachopo we do not expect to see signiﬁcant diﬀerences between the alternatives, given that the ﬁngerprint is created when the transaction starts and corresponds to a very small cost of the entire transaction.
Compared to simple memory accesses, STM barriers are complex operations that add signiﬁcant overhead to transactions doing many memory accesses. Thus, whereas STMs have shown good results for micro-benchmarks, where transactions are small, they often show poor performance on real-world– sized benchmarks, where transactions are more coarse-grained and, therefore, encompass more memory accesses. In this paper, we propose a new runtime technique for lightweight identiﬁcation of captured memory—LICM—for which no STM barriers are needed.
To see what is the eﬀect of removing all the STM barriers for transaction local memory in these benchmarks, we identiﬁed the classes that are instantiated inside a transaction scope, we excluded those classes from being instrumented (in the cases where that was possible without compromising the correctness), and then we measured the speedup obtained. In Vacation, most of the transaction local objects are arrays and, therefore, we have no easy way to avoid those STM barriers in Deuce STM. On the other hand, in STMBench7 the operations traverse a complex graph of objects by using iterators over the collections that represent the connections in that graph.
Algorithms and Architectures for Parallel Processing: 13th International Conference, ICA3PP 2013, Vietri sul Mare, Italy, December 18-20, 2013, Proceedings, Part I by Antonio Balzanella, Rosanna Verde (auth.), Joanna Kołodziej, Beniamino Di Martino, Domenico Talia, Kaiqi Xiong (eds.)